RISC-V Day Tokyo | Fuyuan Zhang: Introducing RISC-V Architecture in Computer Architecture Education
On February 27, during RISC-V Day Tokyo 2025 Spring, engineer Fuyuan Zhang from the PLCT Lab testing team showcased innovative applications of the RISC-V architecture in the field of computer education. The presentation included two independently designed posters, focusing on curriculum innovation and educational dissemination, highlighting the deep integration of open-source hardware technology and educational innovation.