Jiawei Chen Elected as Vice Chair of RISC-V International Foundation’s Packed SIMD TG, Actively Engaging in SIMD Extension Instruction Set Design and Support
On May 13, 2025, the RISC-V International Foundation officially announced the election results for the Packed SIMD Task Group (TG) 2025 Chair and Vice Chair positions. Following a rigorous voting process, Jiawei Chen from PLCT Lab was successfully elected as Vice Chair. He will collaborate with the newly appointed Chair, Rich Fuhler, to lead the Packed SIMD TG, driving innovation and development in SIMD (Single Instruction Multiple Data) extension instruction sets for the RISC-V architecture.