RISC-V Campus Tour | Empowering Students at Beijing Institute of Technology, Zhuhai to Embrace Open Source

On October 24, 2025, the “RISC-V Campus Tour” was successfully held at Beijing Institute of Technology, Zhuhai. Centered on the development and practical application of the RISC-V open-source ecosystem, the event brought together experts, scholars, and students to engage in in-depth discussions on cutting-edge RISC-V technologies, learning paths, and industrial applications—collectively experiencing the power of open source.

Yanling Yang, Community Operations Manager at PLCT Lab and openGauss RISC-V SIG, opened the session with a talk titled “Understanding RISC-V from 0 to 1: Development Overview and Ecosystem Progress.” She outlined RISC-V’s journey from academic origins to global industrial adoption, highlighting its openness, modular design, and efficiency. Through data on chip vendor strategies and developer community activity, she showcased the thriving global RISC-V ecosystem. For students, she offered a practical entry path—from foundational learning resources to ways of contributing to the community—empowering beginners to evolve from “understanding” to “creating.”

Meng Li, Program Manager of the Open Source Promotion Plan (OSPP) at the Software Institute of the Chinese Academy of Sciences, delivered a talk titled “Open Source Promotion Plan: The Best Platform for University Students to Engage in Open Source Practice.” She introduced OSPP as a key initiative under the “Open Source Software Supply Chain Promotion Plan,” launched in 2019, with OSPP itself starting in 2020. Over the years, the program has consistently connected university students with real-world open source projects. Li provided a detailed overview of the participation process and its benefits: under the guidance of experienced mentors, students work on open source projects closely aligned with industry needs, gaining hands-on experience in collaborative development, enhancing technical skills, and building a strong foundation for both academic and career advancement.

Open-source software engineer Yang Liu shared “Box64: Breaking Architecture Barriers—Running x86 Software Efficiently on RISC-V.” Using the Box64 RISC-V project as a case study, he explained binary translation in accessible terms for non-technical audiences. He dissected the conversion logic from x86 to RISC-V instructions, dynamic compilation, and caching strategies, while also addressing challenges such as performance overhead and instruction compatibility—instilling an engineer’s mindset of “facing problems and continuous optimization.”

Compiler engineer Shihua Liao from PLCT Lab delivered “Getting Started with GCC Development,” building a hands-on bridge for compiler learning. He introduced GCC’s architecture—from lexical and syntax analysis to intermediate code generation and backend output—clarifying each stage of source code processing. He then demonstrated debugging techniques, including tool usage and issue tracing, turning abstract compiler concepts into actionable learning steps.

Yuting Nie, Community Operations Manager at PLCT Lab and Project Manager at XuanTie RISC-V Institute, presented “From Beginner to Developer: Exploring RISC-V with XuanTie RISC-V Institute and University Students.” She introduced the jointly launched XuanTie 2025 course series, covering instruction set architecture, chip design, and software development. Whether for beginners or advanced learners, the curriculum offers tailored learning paths. She also explained how to join, the instructor lineup, and available resources—providing students with a fast track to systematic RISC-V learning.

Operating system engineer Yifan Xu shared “RevyOS—A Linux Distribution Optimized for the XuanTie Ecosystem.” Developed by the RevyOS team, this Debian-based distribution is tailored for XuanTie chips, aiming to deliver optimal software support. Xu introduced its system architecture, performance optimization strategies, and real-world applications, showcasing how RevyOS achieves compatibility and efficiency on XuanTie hardware—highlighting customized innovation in the RISC-V OS ecosystem.

Graphics engineer Jingyu Pu presented “The Magical Graphics Stack in the RISC-V Worldline,” focusing on cutting-edge RISC-V applications. He analyzed the current state of integrated GPU adaptation on RISC-V platforms, including driver development, performance tuning, and compatibility challenges. He also explored future directions for open-source graphics stacks, such as community collaboration models and technical breakthroughs—broadening students’ perspectives on RISC-V’s potential in visual and user experience technologies.

The successful conclusion of the RISC-V Campus Tour at Beijing Institute of Technology, Zhuhai not only delivered cutting-edge technical insights but also built a bridge between industry experts and university students. From theoretical overviews to hands-on practices, from ecosystem building to learning strategies, each session opened a window into the world of RISC-V. The event also infused the RISC-V ecosystem with fresh energy and youthful momentum. Looking ahead, more students are expected to join the RISC-V journey, growing through open source and innovating through technology.